C16550
Universal Asynchronous Receiver/Transmitter with FIFOs
Function Description
The C16550 programmable asynchronous communications interface (UART) core provides data formatting and control to a serial communication channel.
The core has select, read/write, interrupt and bus interface logic features that allow data transfers over an 8-bit bi-directional parallel data bus system. With proper formatting and error checking, the core can transmit and receive serial data, supporting asynchronous operation.
Features
- Capable of running with all existing 16450 Software
- Asynchronous operation
- In FIFO mode, Transmitter and Receiver are each buffered with 16-byte FIFOs to reduce the number of interrupts of the CPU
- Programmable data word length (5 - 8 bit), parity and stop bits
- Parity, overrun and framing error checking
- Supports up to 1.5 Mbps transmission rates
- Programmable Baud Rate Generator allows division of any reference clock by 1 to (216-1) and generates an internal 16 X Clock
- False start bit detection
- Automatic break generation and detection
- Internal diagnostic capabilities
- Peripheral modem control functions
- The C16550 was developed in VHDL and synthesizes to approximately 6,500 gates depending on the process used
Symbol
Pin Description
| Name | Type | Polarity | Description |
| RESET | In | High | External Reset |
| CLK | In | - | Master Clock |
| RCLK | In | - | Receive Clock |
| ADSn | In | Low | Address Strobe |
| RDn | In | Low | Read Control |
| WRn | In | Low | Write Control |
| CS0 | In | High | Chip Select 0 |
| CS1 | In | High | Chip Select 1 |
| CS2n | In | Low | Chip Select 2 |
| DIN[7:0] | In | - | Data Input Bus |
| CTSn | In | Low | Clear-to-Send |
| DSRn | In | Low | Data Set Ready |
| DCDn | In | Low | Data Carrier Detect |
| RXDATA | In | - | Receive Data |
| RIn | In | Low | Ring Indicator |
| A[2:0] | In | - | Register Select |
| D0[7:0] | Out | - | Data Output Bus |
| TXDATA | Out | - | Transmit Data |
| DDIS | Out | High | Driver Disable |
| RTSn | Out | Low | Request-to-Send |
| DTRn | Out | Low | Data Terminal Ready |
| OUT1n | Out | Low | Output 1 |
| OUT1n | Out | Low | Output 2 |
| TxRDYn | Out | Low | Transmit Ready |
| RxRDYn | Out | Low | Receiver Ready |
| INTRPT | Out | High | Interrupt |
| BOUDOUTn | Out | Low | Baud Out |
